{"type":"video","version":"1.0","html":"<iframe width=\"560\" height=\"315\" sandbox=\"allow-same-origin allow-scripts\" src=\"https://peertube.f-si.org/videos/embed/5263db6b-a18c-4135-b57e-36d8b3abfedb\" frameborder=\"0\" allowfullscreen></iframe>","width":560,"height":315,"title":"Exploring open hardware solutions for ensuring the security of RISC-V processors, Pablo Navarro, IMSE","author_name":"root","author_url":"https://peertube.f-si.org/accounts/root","provider_name":"PeerTube","provider_url":"https://peertube.f-si.org","thumbnail_url":"https://peertube.f-si.org/static/previews/5263db6b-a18c-4135-b57e-36d8b3abfedb.jpg","thumbnail_width":560,"thumbnail_height":315}