{"type":"video","version":"1.0","html":"<iframe width=\"560\" height=\"315\" sandbox=\"allow-same-origin allow-scripts allow-popups allow-forms\" title=\"From the RISC-V spec to a low-tech SoC, passing by SpinalHDL, VexRiscv and OpenOCD, Charles Papon, SpinalHDL\" src=\"https://peertube.f-si.org/videos/embed/ac64a756-ad3b-48a1-91c9-8cdf08b0cda4\" frameborder=\"0\" allowfullscreen></iframe>","width":560,"height":315,"title":"From the RISC-V spec to a low-tech SoC, passing by SpinalHDL, VexRiscv and OpenOCD, Charles Papon, SpinalHDL","author_name":"FSiC2019","author_url":"https://peertube.f-si.org/video-channels/fsic2019","provider_name":"PeerTube","provider_url":"https://peertube.f-si.org","thumbnail_url":"https://peertube.f-si.org/lazy-static/previews/ac64a756-ad3b-48a1-91c9-8cdf08b0cda4.jpg","thumbnail_width":850,"thumbnail_height":480}